Trigger timing relative to the the time of the beam crossing S2. See notebook 3 for the 1995 times.
The zero time is defined as the time of the beam crossing the beam counter S2. The cable from S2 to the patch panel is RG62 (93 ohm), 24 feet long. This produces a delay of 29 ns. The transit time in the photomultiplier is estimated to be 30 ns, therefore, patch panel time = 60 ns in this system.
The S2 patch panel is in rack 4; the discriminator is located at 8-1-7-4 (rack-crate-unit-subunit) 18 ns away. The discriminator output is at 85 ns.
Changes for 1997 In 1997 H9, C9, and the RAM were added to the trigger. The LGD MAM trigger processor was not used. CPVB was physically removed. CPVC was not used. DEA was not used in the trigger but was active. A new S5A/S5b was added. A new S2A/S2B was added part way through the run.
signal time (ns)
1/8/95 2/4/95 4/24/97
beam crosses S2 0 0
S2 at FT rack 4 panel 60 60
S2 out of disc(8-1-7-4) 85 85
pretrigger at panel
pretrigger fanout 280 280 280 w120
upstream beam pretrig
at pretrig fanout 280
beam pwc input to
to stobe fanout 300 295/300 297 w120 input
314 w110 output
at pwc A4 input 323 w110
C9 disc spy (tube 65T) 272 w70
C9 strobe into 4616 305 w120
H9 disc spy (ctr 4T) 436 w36
H9C9 strobe into 4616 441 w20
H9C9 gate into gated latch 640 w105
RAM strobe, at TTL output 727 w60
RAM 1A output of 744
center of 1st transistion 814
end of 2nd transistion 950
tpx1 gate 470 460 434 w100
tpx2 gate 476 460 434 w100
tpx3 gate 496 470 442 w100
TCYL>0 pulse
TCYL=1 pulse 614-680-764
delta_t level
strobe TPX mlu 695 730 718 w40 at 4616 input
CPVB pulse 775 w60
CPVC pulse 770 w60
DEA pulse 775
S0 pulse
strobe level_1 790 800 798 w40 at 4616 input
clockstop at MDM 825 825 831 w115 into 1B panel
strobe 4508 prescale
outpt of 429 7-1-11-2 890 920 902 w40
level_1 out at spy
lev_1 429 out 7-3-10-1 940 950 962 w36
lev_1 disc out 7-3-12-1 980 1000 989 w23
level_2 strobe 3.74 us
tdc stop
1995 level_2
The level 2 timing was derived from the LGD MAM done signal which came at varying
times depending on the complexity of the LGD data -- typically between 8 and 16
micoseconds after beam crosses S2.
1997 level_2
The LGD MAM processor was not used in 1997. The 1997 level 2 trigger was simply
derived from level 1. The electronics remains the same as in 1995. The 1997 level 2
trigger was simply introduced into the mam done/level 2 discriminator located
at (8-1-7-1) and the level 2 timing was tighten as compared to 1995.
1995 1997
mam done/lev_2 disc out (8-1-7-1) define as t=0 3.72 us w50 (t=0)
mam done/lev_2 to lev_2 4508 clear 7-5-12-2 30 ns 20 ns w50
mam done/lev_2 strobe (input 4616 7-1-7) 24 w75
mam/lev_2_dly__150 out (8-4-1-1) 420 w100
lev_2A/B charged OR output 8-4-6 480 w100
strobe 2A/2B plu (7-5-2-3) output 430 w100
strobe 2B/2C plu (7-5-2-4) output 430 w100
mam/lev_2_dly_300 out (8-4-1-2) 745 w50
final trig to DAQ (7-5-6-3) out 770 w600
//end file